This section contains 64 words (approx. 1 page at 300 words per page) |
Intel Corporation of Santa Clara, California, has indicated that there will be three levels of cache memories within their "Madison" Itanium processor, and the largest cache block will be a staggering 6 megabytes in size. This amount of memory constituted approximately the entire memory subsystem of popular microcomputers of only a decade earlier.
This section contains 64 words (approx. 1 page at 300 words per page) |